Differential CMOS edge-triggered flip-flop with clock gating.
Citation
Xia, Y. & Almaini, A. E. A. (2002). Differential CMOS edge-triggered flip-flop with clock gating. Electronics Letters. 38, 9-11. doi:10.1049/el:20020038. ISSN 0013-5194
Authors
Keywords
CMOS integrated circuits; Flip-flops; Edge-trigger; PSPICE simulation; Power saving;
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