A novel low power FSM partition approach and its implementation.
Journal Article
Xia, Y., Ye, X., Wang, L. Y., Tao, J., & Almaini, A. E. A. (2005)
A novel low power FSM partition approach and its implementation. NORCHIP Conference, 102-105. https://doi.org/10.1109/NORCHP.2005.1596999
A new Finite State Machine (FSM) partioning approach is proposed in this paper. A genetic algorithm (GA) is employed to search the optimal or near optimal solution. A new cost...
FPGA placement using genetic algorithm with simulated annealing.
Journal Article
Yang, M., Almaini, A. E. A., Wang, L. Y. & Wang, P. (2005)
FPGA placement using genetic algorithm with simulated annealing. ASICON. 2, 808-811. doi:10.1109/ICASIC.2005.1611450
A mixed Genetic Algorithm and Simulated Annealing (GASA) algorithm is used for the placement of symmetrical FPGA. The prpoposed algortithm includes 2 stage processes. In the f...
A novel multiple-valued CMOS flip-flop employing multiple-valued clock.
Journal Article
Xia, Y., Wang, L. Y. & Almaini, A. E. A. (2005)
A novel multiple-valued CMOS flip-flop employing multiple-valued clock. Journal of Computer Science and Technology. 20, 237-242. doi:10.1007/s11390-005-0237-4. ISSN 1000-9000
A new CMOS quaternary D flip-flop is implemented employing a multiple-valued clock. PSpice simulation shows that the proposed flip-flop has correct operation. Compared with tr...
Expansion of logical function in the OR-coincidence system and the transform between it and maxterm expansion.
Journal Article
Cheng, J., Chen, X., Faraj, K. & Almaini, A. E. A. (2003)
Expansion of logical function in the OR-coincidence system and the transform between it and maxterm expansion. IEE proceedings. Computers and digital techniques. 150, 397-402. doi:10.1049/ip-cdt:20030969. ISSN 1350-2387
Based on the features of coincidence operation, a canonical OR coincidence (COC) expansion of logical functions in the OR-coincidence algebraic system is proposed, and its map...
Reversed ROBDD circuits.
Journal Article
Bystrov, A. & Almaini, A. E. A. (1998)
Reversed ROBDD circuits. Electronics Letters. 34, 1447-1449. doi:10.1049/el:19981070. ISSN 0013-5194
A new class of logic circuits is proposed. Being derived from reduced ordered binary decision diagrams, these circuits inherit compactness and the ability to represent very la...
Generalised Reed-Muller ASIC converter.
Conference Proceeding
Almaini, A. E. A. & Burnside, K. (1996)
Generalised Reed-Muller ASIC converter. In 2nd International Conference on ASIC, 73-76. doi:10.1109/ICASIC.1996.562754. ISBN 7-5439-0940-5
The paper outlines the design for a new IC for bidirectional conversion between the functional and operational domains of logic funcyions. The circuit can generate all fixed p...
Using genetic algorithms for the variable ordering of Reed-Muller binary decision diagrams
Journal Article
Almaini, A. E. A., & Zhuang, N. (1995)
Using genetic algorithms for the variable ordering of Reed-Muller binary decision diagrams. Microelectronics Journal, 26(5), 471-480. https://doi.org/10.1016/0026-2692%2895%2998949-R
Results are reported of the use of genetic algorithms for the variable ordering problem in Reed-Muller binary decision diagrams. Tests carried out on benchmark examples and ra...