Expansion of logical function in the OR-coincidence system and the transform between it and maxterm expansion.
Cheng, J., Chen, X., Faraj, K. & Almaini, A. E. A. (2003)
Expansion of logical function in the OR-coincidence system and the transform between it and maxterm expansion. IEE proceedings. Computers and digital techniques. 150, 397-402. doi:10.1049/ip-cdt:20030969. ISSN 1350-2387
Based on the features of coincidence operation, a canonical OR coincidence (COC) expansion of logical functions in the OR-coincidence algebraic system is proposed, and its map...
Differential CMOS edge-triggered flip-flop with clock gating.
Xia, Y. & Almaini, A. E. A. (2002)
Differential CMOS edge-triggered flip-flop with clock gating. Electronics Letters. 38, 9-11. doi:10.1049/el:20020038. ISSN 0013-5194
A non-redundant transition clock chain is proposed and applied to differential edge-triggered flip-flops. PSPICE simulation shows that compared to a recently published design ...
Abstraction: a key notation for reverse engineering in a system re-engineering approach.
Yang, H., Liu, X. & Zedan, H. (1999)
Abstraction: a key notation for reverse engineering in a system re-engineering approach. Journal of Software: Evolution and Process. 12, 197-228. doi:10.1002/1096-908X(200007/08)12:43.0.CO;2-X. ISSN 2047-7481
This paper advocates that extracting formal specification semantically consistent to the original legacy system will facilitate further redesign and forward engineering greatl...
Reversed ROBDD circuits.
Bystrov, A. & Almaini, A. E. A. (1998)
Reversed ROBDD circuits. Electronics Letters. 34, 1447-1449. doi:10.1049/el:19981070. ISSN 0013-5194
A new class of logic circuits is proposed. Being derived from reduced ordered binary decision diagrams, these circuits inherit compactness and the ability to represent very la...
One-bit adder design based on Reed-Muller expansions.
Guan, Z. & Almaini, A. E. A. (1995)
One-bit adder design based on Reed-Muller expansions. International Journal of Electronics. 79, 519-529. doi:10.1080/00207219508926289. ISSN 0020-7217
It has been claimed for some time that the Reed-Muller technique can yield a simpler arithmetic circuit if it is employed in the design procedure. In fact, no practical applic...
Using genetic algorithms for the variable ordering of Reed-Muller binary decision diagrams.
Almaini, A. E. A. & Zhuang, N. (1995)
Using genetic algorithms for the variable ordering of Reed-Muller binary decision diagrams. Microelectronics Journal. 26, 471-480. doi:10.1016/0026-2692(95)98949-R. ISSN 0026-2692
Results are reported of the use of genetic algorithms for the variable ordering problem in Reed-Muller binary decision diagrams. Tests carried out on benchmark examples and ra...
Open-loop transversal equaliser of optimal length
Rutter, M., & Cowan, C. F. N. (1983)
Open-loop transversal equaliser of optimal length. Electronics Letters, 19, 208-210. https://doi.org/10.1049/el%3A19830144
As a rule, in equaliser training algorithms complexity
increases with efficiency. Unfortunately, complex recursive
algorithms do not suit high-bandwidth systems. This letter