Differential CMOS edge-triggered flip-flop with clock gating.
Xia, Y. & Almaini, A. E. A. (2002)
Differential CMOS edge-triggered flip-flop with clock gating. Electronics Letters. 38, 9-11. doi:10.1049/el:20020038. ISSN 0013-5194
A non-redundant transition clock chain is proposed and applied to differential edge-triggered flip-flops. PSPICE simulation shows that compared to a recently published design ...
Speed and scale up software re-engineering with abstraction patterns and rules.
Liu, X., Yang, H., Zedan, H., & Cau, A. (2000)
Speed and scale up software re-engineering with abstraction patterns and rules. In International Symposium on Principles of Software Evolution, 2000. Proceedings, 90. https://doi.org/10.1109/ISPSE.2000.913226
Software reengineering is an essential part of software evolution. Two important issues faced by software reengineering techniques are the time involved and the ability to cop...
Abstraction: a key notation for reverse engineering in a system re-engineering approach.
Yang, H., Liu, X. & Zedan, H. (1999)
Abstraction: a key notation for reverse engineering in a system re-engineering approach. Journal of Software: Evolution and Process. 12, 197-228. doi:10.1002/1096-908X(200007/08)12:43.0.CO;2-X. ISSN 2047-7481
This paper advocates that extracting formal specification semantically consistent to the original legacy system will facilitate further redesign and forward engineering greatl...
Reversed ROBDD circuits.
Bystrov, A. & Almaini, A. E. A. (1998)
Reversed ROBDD circuits. Electronics Letters. 34, 1447-1449. doi:10.1049/el:19981070. ISSN 0013-5194
A new class of logic circuits is proposed. Being derived from reduced ordered binary decision diagrams, these circuits inherit compactness and the ability to represent very la...
Tackling the abstraction problem for reverse engineering in a system re-engineering approach.
Yang, H., Liu, X., & Zedan, H. (1998)
Tackling the abstraction problem for reverse engineering in a system re-engineering approach. In the proceedings of the IEEE Conference on Software Maintenance (ICSM'98), 284. https://doi.org/10.1109/ICSM.1998.738520
It is widely accepted that reverse engineering has three components: restructuring, comprehension and production of formal specification. In this paper, we advocate that the t...
Generalised Reed-Muller ASIC converter.
Almaini, A. E. A. & Burnside, K. (1996)
Generalised Reed-Muller ASIC converter. In 2nd International Conference on ASIC, 73-76. doi:10.1109/ICASIC.1996.562754. ISBN 7-5439-0940-5
The paper outlines the design for a new IC for bidirectional conversion between the functional and operational domains of logic funcyions. The circuit can generate all fixed p...
Robot Calibration Using Artificial Neural Networks
Zhong, X. Robot Calibration Using Artificial Neural Networks. (Thesis)
Napier University. Retrieved from http://researchrepository.napier.ac.uk/Output/2254583
Robot calibration is an integrated procedure of measurement and data processing to improve and maintain robot positioning accuracy. Existing robot calibration techniques requi...
One-bit adder design based on Reed-Muller expansions.
Guan, Z. & Almaini, A. E. A. (1995)
One-bit adder design based on Reed-Muller expansions. International Journal of Electronics. 79, 519-529. doi:10.1080/00207219508926289. ISSN 0020-7217
It has been claimed for some time that the Reed-Muller technique can yield a simpler arithmetic circuit if it is employed in the design procedure. In fact, no practical applic...
Using genetic algorithms for the variable ordering of Reed-Muller binary decision diagrams.
Almaini, A. E. A. & Zhuang, N. (1995)
Using genetic algorithms for the variable ordering of Reed-Muller binary decision diagrams. Microelectronics Journal. 26, 471-480. doi:10.1016/0026-2692(95)98949-R. ISSN 0026-2692
Results are reported of the use of genetic algorithms for the variable ordering problem in Reed-Muller binary decision diagrams. Tests carried out on benchmark examples and ra...
Logic synthesis and optimisation using Reed-Muller expansions
McKenzie, L. M. Logic synthesis and optimisation using Reed-Muller expansions. (Thesis)
Edinburgh Napier University. Retrieved from http://researchrepository.napier.ac.uk/id/eprint/4276
This thesis presents techniques and algorithms which may be employed to represent, generate and optimise particular categories of Exclusive-OR SumOf-Products (ESOP) forms. The...