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An evolutionary approach for symmetrical field programmable gate array placement.

Conference Proceeding
Yang, M., Almaini, A. E. A., Wang, L. Y., & Wang, P. (2005)
An evolutionary approach for symmetrical field programmable gate array placement. In Research in Microelectronics and Electronics, 2005 PhD, 169-172. https://doi.org/10.1109/RME.2005.1543030
An evolutionary computation method is used to place a set of different Microelectronics Center of North Carolina (MCNC) benchmark circuits on traditional symmetrical Field Pro...

Fast tabular based conversion methods for Canonical OR-Coincidence.

Conference Proceeding
Yang, M., Wang, P., Chen, X., & Almaini, A. E. A. (2005)
Fast tabular based conversion methods for Canonical OR-Coincidence. In EUROCON 2005 - The International Conference on Computer as a Tool, 507-510. https://doi.org/10.1109/EURCON.2005.1629976
Two fast conversion alogorithms based on tabular technique for Canonical OR-Coincidence (COC) expansions are introduced. By using bitwise operations, the Serial Tabular Techni...

FPGA placement using genetic algorithm with simulated annealing.

Journal Article
Yang, M., Almaini, A. E. A., Wang, L. Y. & Wang, P. (2005)
FPGA placement using genetic algorithm with simulated annealing. ASICON. 2, 808-811. doi:10.1109/ICASIC.2005.1611450
A mixed Genetic Algorithm and Simulated Annealing (GASA) algorithm is used for the placement of symmetrical FPGA. The prpoposed algortithm includes 2 stage processes. In the f...

A novel multiple-valued CMOS flip-flop employing multiple-valued clock.

Journal Article
Xia, Y., Wang, L. Y. & Almaini, A. E. A. (2005)
A novel multiple-valued CMOS flip-flop employing multiple-valued clock. Journal of Computer Science and Technology. 20, 237-242. doi:10.1007/s11390-005-0237-4. ISSN 1000-9000
A new CMOS quaternary D flip-flop is implemented employing a multiple-valued clock. PSpice simulation shows that the proposed flip-flop has correct operation. Compared with tr...

Expansion of logical function in the OR-coincidence system and the transform between it and maxterm expansion.

Journal Article
Cheng, J., Chen, X., Faraj, K. & Almaini, A. E. A. (2003)
Expansion of logical function in the OR-coincidence system and the transform between it and maxterm expansion. IEE proceedings. Computers and digital techniques. 150, 397-402. doi:10.1049/ip-cdt:20030969. ISSN 1350-2387
Based on the features of coincidence operation, a canonical OR coincidence (COC) expansion of logical functions in the OR-coincidence algebraic system is proposed, and its map...

Area and power optimization of FPRM function based circuits.

Conference Proceeding
Xia, Y., Ali, B., & Almaini, A. E. A. (2003)
Area and power optimization of FPRM function based circuits. In Proceedings of the 2003 IEEE INternational Symposium on Circuits and Systems, V329-V332. https://doi.org/10.1109/ISCAS.2003.1206270
In this paper a frame of power dissipation estimation for FPRM function based circuits is presented and polarity conversion is proposed to optimize power and area for FPRM fun...

Power minimization of FRPM functions based on polarity conversion.

Journal Article
Xia, Y., Wu, X. & Almaini, A. E. A. (2003)
Power minimization of FRPM functions based on polarity conversion. Journal of Computer Science and Technology. 18, 325-331. doi:10.1007/BF02948902. ISSN 1000-9000
For an n-variable Boolean function, there are 2[to the nth power] fixed polarity Reed-Muller (FPRM) forms. In this paper, a frame of power dissipation estimation for FPRM func...

Modulo correlativity and its application in a multiple valued logic system.

Journal Article
Wang, L. Y., Chen, X. & Almaini, A. E. A. (1998)
Modulo correlativity and its application in a multiple valued logic system. International Journal of Electronics. 85, 561-570. doi:10.1080/002072198133851. ISSN 0020-7217
Several new concepts such as pseudoprime and correlativity, are presented. Then modulo subtraction and modulo division, which are very useful in computing the canonical expans...

Reversed ROBDD circuits.

Journal Article
Bystrov, A. & Almaini, A. E. A. (1998)
Reversed ROBDD circuits. Electronics Letters. 34, 1447-1449. doi:10.1049/el:19981070. ISSN 0013-5194
A new class of logic circuits is proposed. Being derived from reduced ordered binary decision diagrams, these circuits inherit compactness and the ability to represent very la...

Semicustom IC for generating optimum generalised Reed-Muller expansions.

Journal Article
Almaini, A. E. A. (1997)
Semicustom IC for generating optimum generalised Reed-Muller expansions. Microelectronics Journal. 28, 129-142. doi:10.1016/S0026-2692(96)00087-0. ISSN 0026-2692
The paper explains the theory and design of a semi-custom integrated circuit (IC) for the generation of optimum polarity of a given Boolean function. Given the minterm coeffic...