Citation
Wang, L. Y. & Almaini, A. E. A. (2002). Optimisation of Reed-Muller PLA implementations. IEE proceedings. Circuits, devices, and systems. 149, 119-128. doi:10.1049/ip-cds:20020354. ISSN 1350-2409
Authors
Keywords
Reed-Muller PLA; circuits; applications; electronic engineering; computing;
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