A study of arithmetic circuits and the effect of utilising Reed-Muller techniques
Citation
Guan, Z. A study of arithmetic circuits and the effect of utilising Reed-Muller techniques. (Thesis). Edinburgh Napier University. Retrieved from http://researchrepository.napier.ac.uk/id/eprint/4340
Keywords
Reed-Muller; logic design; arithmetic circuits; logic circuits; CMOS; carry chain;
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